1. Field of the Invention
The present invention relates to a DC-DC converter, and more particularly, to a DC-DC converter including a short-circuit protection circuit for stopping a circuit operation when an output voltage abnormality such as a short circuit of an output terminal is detected.
2. Description of the Related Art
In a conventional DC-DC converter, a timer latch short-circuit protection circuit of output voltage detection type is normally provided (see, for example, JP 2004-040858 A).
FIG. 3 is a block diagram showing a step-up switching regulator which is an example of the DC-DC converter. While a switching transistor 35 is in an ON state, a current flows into an inductance 31 connected in series between an input power source terminal and an output voltage terminal to store energy therein. While the switching transistor 35 is in an OFF state, the energy stored in the inductance 31 is combined with an input power source voltage. The resultant voltage is rectified by a diode 32 and smoothed by an output capacitor 33 to become an output voltage. The output voltage is fed back to a switching regulator control circuit 36 by voltage dividing resistors 37 and 38. The switching transistor 35 is controlled by the switching regulator control circuit 36 such that the output voltage reaches a predetermined value.
FIG. 4 is a circuit diagram showing a conventional timer latch short-circuit protection circuit provided in the switching regulator control circuit 36. The timer latch short-circuit protection circuit includes a detection circuit 41, a delay circuit 42, and a latch circuit 43. The detection circuit 41 compares a feedback voltage Vfb separated from the output voltage with a reference voltage Vref1 generated by a reference voltage circuit to detect the presence or absence of abnormality of the output voltage and outputs an output abnormality detection signal based on a result obtained by detection. The delay circuit 42 delays the output abnormality detection signal by a predetermined time. The latch circuit 43 latches an output abnormality signal outputted from the delay circuit 42. The switching regulator control circuit 36 stops the switching operation in response to the output abnormality signal outputted from the timer latch short-circuit protection circuit.
When the abnormality of the output voltage is detected, the switching operation of the switching regulator control circuit 36 is stopped in response to the output from the latch circuit 43. After that, when a UVLO circuit detects a reduction in input voltage, the conventional timer latch short-circuit protection circuit is reset in response to a UVLO signal outputted therefrom. Here, assume that a voltage for generating a reset signal-1 for the detection circuit 41 and the delay circuit 42 is set to a value lower than a voltage (for example, UVLO voltage) for generating a reset signal-2 for the latch circuit 43. Therefore, even when the input power source voltage instantaneously reduces to the UVLO voltage or less to reset the latch circuit 43, in the case where the input power source voltage does not become lower than the generated voltage of the reset signal-1, the abnormality detection and delay operation are normally performed without resetting the detection circuit 41 and the delay circuit 42. Thus, the switching operation can be stopped.
In order to reset the detection circuit 41 and the delay circuit 42 in the conventional timer latch short-circuit protection circuit, it is necessary to reduce the input power source voltage to the voltage for generating the reset signal-2. However, a capacitor 34 having a large capacitance value necessary for stabilization is connected with a power source 30, so it takes a long time to reduce the input power source voltage to the voltage for generating the reset signal-2. Therefore, there is a problem in which the reset operation requires a long time.